The present invention relates to a semiconductor device, particularly to a multi-chips module (MCM) type semiconductor device adapted to be mounted on a board and to be electrically connected to the board.
JP-A-11-220077 discloses that a coefficient of thermal expansion and so forth is adjusted to restrain a crack of a semiconductor element and/or an under-fill in a flip-chip type semiconductor device. JP-A-2000-40775 discloses a shape of an oblique surface of the under-fill is adjusted to restrain the crack of the semiconductor element.
An object of the present invention is to provide a semiconductor device in which an excessive stress, for example, an excessive thermal stress is restrained to maintain a reliability of the semiconductor device.
In a semiconductor device adapted to be mounted on a board and to be electrically connected to the board, comprising, at least two semiconductor electric chips, and a substrate on which the semiconductor electric chips are mounted and to which the semiconductor electric chips are electrically connected, in such a manner that the semiconductor electric chips are mounted on and electrically connected to the board through the substrate, according to the present invention, a thickness of each of the semiconductor electric chips in a direction in which the each of the semiconductor electric chips and the substrate are stacked is smaller than a thickness of the substrate in the direction.
Since the thickness of the each of the semiconductor electric chips in the direction in which the each of the semiconductor electric chips and the substrate are stacked is smaller than the thickness of the substrate in the direction, a bending rigidity of the each of the semiconductor electric chips is kept small while a bending rigidity of the substrate is kept great. Therefore, a stress in and on the each of the semiconductor electric chips is kept small when the semiconductor device is bent with a thermal deformation thereof and/or an external force applied to the semiconductor device.
When a Young""s modulus of the semiconductor electric chips is larger than a Young""s modulus of the substrate, it is more important that the bending rigidity of the each of the semiconductor electric chips is kept small, because, the greater the Young""s modulus of the semiconductor electric chips is, the greater the stress in and on the each of the semiconductor electric chips is. When a linear expansion coefficient of the semiconductor electric chips is smaller than a linear expansion coefficient of the substrate, it is more important that the bending rigidity of the each of the semiconductor electric chips is kept small. The semiconductor electric chips may be distant away from each other in a direction perpendicular to the direction.
The semiconductor device may further comprise a synthetic resin layer connected to the each of the semiconductor electric chips and the substrate so that the each of the semiconductor electric chips is connected to the substrate through the synthetic resin layer. When the Young""s modulus of the semiconductor electric chips is larger than a Young""s modulus of the synthetic resin layer, it is more important that the bending rigidity of the each of the semiconductor electric chips is kept small, because, the greater the Young""s modulus of the semiconductor electric chips is, the greater the stress in and on the each of the semiconductor electric chips is. When the linear expansion coefficient of the semiconductor electric chips is smaller than a linear expansion coefficient of the synthetic resin layer, it is more important that the bending rigidity of the each of the semiconductor electric chips is kept small. When the semiconductor device further comprises an electrically conductive member through which the each of the semiconductor electric chips is electrically connected to the substrate, it is preferable for reinforcing effectively the electrically conductive member that the electrically conductive member is surrounded by the synthetic resin layer. When the semiconductor device further comprises the electrically conductive member through which the each of the semiconductor electric chips is electrically connected to the substrate, and an electrically insulating layer including synthetic resin arranged between the synthetic resin layer and the semiconductor electric chips so that the synthetic resin layer is connected to the semiconductor electric chips through the electrically insulating layer and including a surface extending perpendicular to the direction, it is preferable for restraining the excessive stress on the electrically conductive member when the semiconductor device is bent that the electrically conductive member extends on the surface between the electrically insulating layer and the synthetic resin layer. It is preferable that a Young""s modulus of the synthetic resin layer under DMA measuring is not more than 10 GPA, and a linear expansion coefficient of the synthetic resin layer under TMA measuring is not more than 35xc3x9710xe2x88x926Kxe2x88x921.
When the semiconductor device further comprises a metallic member connected to the semiconductor electric chips, and an adhesive through which the metallic member connected to the semiconductor electric chips, it is preferable for restraining the excessive stress on the semiconductor electric chips that a Young""s modulus of the adhesive is smaller than a Young""s modulus of the semiconductor electric chips.
When the each of the semiconductor electric chips includes a first surface facing to the substrate and a second surface as a reverse surface with respect to the first surface, it is preferable for restraining a crack on the semiconductor electric chips that the second surface of at least one of the semiconductor electric chips is a grinder-finished surface, because a maximum principal stress is generated on the second surface when the semiconductor device is bent by the internal thermal deformation or the external force.
The thickness of the each of the semiconductor electric chips may be not more than 50% of the thickness of the substrate. It is more preferable that the thickness of the each of the semiconductor electric chips is not more than 30% of the thickness of the substrate. It is preferable that 12 less than As (xc3x9710xe2x88x926Kxe2x88x921)xe2x89xa620 and tc/tsxe2x89xa6xe2x88x92xe2x88x920.04As+1.1 when a linear expansion coefficient of the substrate under TMA measuring is As, and a thickness of the each of the semiconductor chips is tc and a thickness of the substrate is ts.
It is proved on the basis of theoretical calculations as follows that the present invention is effective in various cases. A thermal stress on and in the semiconductor electric chip in a temperature variation range between xe2x88x9255xc2x0 C. and 125xc2x0 C. was calculated by two-dimensional elasticity analysis of finite element method. FIG. 2 shows a model of a semiconductor device to be analyzed. Principal stresses at a point A (central position of reverse surface of semiconductor chip) and at a point B (upper end of oblique surface of under fill joining surface of semiconductor chip) are calculated as important values by which whether or not a crack occurs in the semiconductor device is judged. A size of finite element of the semiconductor electric chip is set at 0.1 mmxc3x970.05 mm for the calculation, because the point B is a stress concentration point at which the stress has a singularity.
As shown in FIG. 3 showing a calculation result, the principal stresses at the point A and B do not changed significantly in accordance with a number of the semiconductor electric chips on the substrate and/or a distance between the semiconductor electric chips. As shown in FIG. 4 showing a calculation result, the principal stresses at the point A and B do not changed significantly in accordance with a width of the semiconductor electric chip. As shown in FIG. 5 showing a calculation result, the principal stresses at the point A and B do not changed significantly in accordance with a width of the substrate. FIG. 6 shows dimensions of the under fill oblique surface in the model of a semiconductor device to be analyzed. As shown in FIG. 7 showing a calculation result, the stress at the point A does not change in accordance with the shape of the under fill oblique surface, and the stress becomes the maximum value at the point B when the point B (upper end of under fill oblique surface) is formed at the lower end of the semiconductor electric chip and an angle between the under fill oblique surface and the upper surface of the substrate is 45 degrees (h=1). As shown in FIG. 8 showing a calculation result, the principal stresses at the point A and B do not changed significantly in accordance with a difference in shape between the under fill oblique surfaces. As shown in FIG. 9 showing a calculation result, the principal stresses at the point A and B do not changed significantly in accordance with whether or not the under fills under the semiconductor electric chips are connected to each other.
Therefore, the principal stress at the point B formed at the lower end of the semiconductor electric chip with the angle of 45 degrees between the under fill oblique surface and the upper surface of the substrate as the maximum value of the principal stress in the semiconductor device was calculated as follows, while a number of the semiconductor electric chip on the substrate is 1, a width of the semiconductor electric chip is about 7 mm, a width of the substrate is about 25 mm, the thickness of the semiconductor electric chip is changed, the thickness of the substrate is changed, the coefficient of linear expansion of the substrate is changed, the coefficient of linear expansion of the under fill is changed, the Young""s modulus of the under fill is changed, the Young""s modulus of the semiconductor electric chip is fixed to about 190 GPA as the average Young""s modulus value of semiconductor materials such as silicon, the coefficient of linear expansion of the semiconductor electric chip is fixed to about 3xc3x9710xe2x88x926Kxe2x88x921 as the average Young""s modulus value of semiconductor materials such as silicon, and the Young""s modulus of the substrate is fixed to about 20 GPA as the average Young""s modulus value of resin substrate materials such as glass-epoxy. The stress in and on the semiconductor electric chip changes significantly in accordance with the coefficient of linear expansion of the substrate, but does not change significantly in accordance with the Young""s modulus of the substrate.
As shown in FIG. 10a showing a principal stress calculation result at the point A, and FIG. 10b showing a principal stress calculation result at the point B, when a critical principal stress is a value of principal stress on the semiconductor chip at which value a crack occurs on the semiconductor chip in a cyclic temperature change test, the Young""s modulus of the under fill is about 10 GPA, and the coefficient of linear expansion of the under fill is about 35xc3x9710xe2x88x926Kxe2x88x921, the principal stress at the point A decreases abruptly in accordance with a decrease of a ratio of semiconductor chip thickness/substrate thickness when the ratio is less than 1, and the principal stress at the point B decreases abruptly in accordance with the decrease of the ratio of semiconductor chip thickness/substrate thickness.
As shown in FIG. 11a showing a principal stress calculation result at the point A, and FIG. 11b showing a principal stress calculation result at the point B, when the coefficient of linear expansion of the substrate is 15xc3x9710xe2x88x926Kxe2x88x921, the Young""s modulus of the under fill is changed between about 10 GPA and about 6 GPA of the Young""s modulus of the usually used under fills, and the coefficient of linear expansion of the under fill is changed between about 35xc3x9710xe2x88x926Kxe2x88x921 and about 30xc3x9710xe2x88x926Kxe2x88x921 of the coefficient of linear expansion of the usually used under fills, the principal stress at the point A does not change significantly in accordance with the coefficient of linear expansion and Young""s modulus of the under fill, and the principal stress at the point B decreases in accordance with the decreases of each of the coefficient of linear expansion and Young""s modulus of the under fill.
It is understood from the principal stress calculation results as shown in FIGS. 10a, 10b, 11a and 11b that the smaller the thickness of the semiconductor chip is, the smaller the principal stress in the semiconductor device is, when the ratio of semiconductor chip thickness/substrate thickness when the ratio is less than 1. Further, it is preferable for each of the coefficient of linear expansion of the substrate, the coefficient of linear expansion of the under fill and the Young""s modulus of the under fill to be as small as possible. In order to decrease the principal stress in the semiconductor device to less than the critical principal stress so that the crack in the semiconductor device is restrained from occurring, it is necessary that the thickness of the semiconductor chip is not more than 50% of the thickness of the substrate when the Young""s modulus of the under fill is not more than about 10 GPA, the coefficient of linear expansion of the under fill is not more than about 35xc3x9710xe2x88x926K-1, and the coefficient of linear expansion of the substrate is not more than about 20xc3x9710xe2x88x926Kxe2x88x921, or it is necessary that the thickness of the semiconductor chip is not more than 30% of the thickness of the substrate when the Young""s modulus of the under fill is not more than about 10 GPA, the coefficient of linear expansion of the under fill is not more than about 35xc3x9710xe2x88x926Kxe2x88x921, and the coefficient of linear expansion of the substrate is not more than about 15xc3x9710xe2x88x926Kxe2x88x921. For example, 12 less than As (xc3x9710xe2x88x926Kxe2x88x921)xe2x89xa620 and tc/tsxe2x89xa6xe2x88x920.04As+1.1 when the linear expansion coefficient of the substrate is As(xc3x9710xe2x88x926Kxe2x88x921), and the thickness of the semiconductor chip is tc and the thickness of the substrate is ts.
Other objects, features and advantages of the invention will become apparent from the following description of the embodiments of the invention taken in conjunction with the accompanying drawings.